The present invention generally relates to a semiconductor device, and in particular to a semiconductor device in which a plurality of power supply lines are formed so as to be concentric in chip peripheral regions on an integrated-circuit chip in a semiconductor device by means of a multi-layer interconnection.
In a semiconductor device such as an integrated circuit, the area for interconnection or metallization in an integrated-circuit chip increases, as the integration density of a semiconductor device increases. Therefore, a multi-layer interconnection is widely employed to enhance the integration density of the semiconductor device. Generally, the multi-layer interconnection is carried out not only for interconnection between cells formed on the chip, but also for power supply lines for supplying the cells with electric power served from an external poewr source. In particular, when the power supply lines are formed according to the multi-layer metallization, the power supply lines are arranged so as to be concentric in chip peripheral regions on the chip. This is because the use of the concentric power supply lines makes it possible to reduce the number of power terminal pads which are formed in the chip peripheral regions. In addition, it is possible to make the length of branch power lines extending from the concentric power supply lines to the cells formed in internal circuit regions short. In other words, if the power supply lines are made up of a plurality of separated line pieces, it becomes necessary to mount many power terminal pads on the chip and also to extend relatively long branch power lines to the cells in the internal circuit regions surrounded by the concentric power lines.
The chip aforementioned is generally packaged to protect it from external environments. As well known, plastic molding seal is widely used as one of packaging means of the chip. When sealing the chip with plastics, attention must be paid to thermal expansion coefficients of the chip and plastics. In detail, the thermal expansion coefficients of the chip and plastics are approximately 3.times.10.sup.-6 .degree. C..sup.-1 and 2.times.10.sup.-5 .degree. C..sup.-1, respectively. That is, the thermal expansion coefficient of plastics is much larger than that of the chip. Therefore, the difference in the thermal expansion coefficients causes mechanical stress as a function of temperature in the plastic molded semiconductor device. In particular, when the mechanical stress exceeds a certain magnitude, cracks are generated in the chip. The cracks frequently cause disconnection of power lines on the chip. The cracks also lead to short-circuiting between the power lines, especially when moisture enters into the cracks. It should be noted that the mechanical stress is greatest in corner regions of the chip in the plastic molded semiconductor device, compared with the internal circuit regions of the chip in which many cells are arranged. That is, the longer the distance from the center of the chip, the larger the magnitude of the mechanical stress. Therefore, the disconnection and/or short-circuit in the power lines are frequently brought about in the chip corner regions.
Strain buffer material or plastic of a low thermal expansion coefficient which is nearly equal to that of the chip is now being investigated in order to suppress the generation of the cracks resulting from the difference in the thermal expansion coefficients. However, currently it is impossible to perfectly suppress the generation of the cracks.